In conventional computers and microcomputers there is a constant contention between the microprocessor and the I/O processor for memory access. This is a particularly serious problem in signal processing applications requiring high speed processing of massive amounts of data and high I/O rates. There are four approaches commonly used to enable fair sharing of the memory. One is to use dual port memories: these are generally complex and expensive and have small capacity. A second approach uses "cycle stealing" wherein one of the microprocessor and I/O processor has priority over the other and "steals" memory access when it needs it, thereby interrupting the operation of the other. This slows down the response of the interrupted processor and of the whole system. The third approach uses a number of separate memory banks so that most of the time each of the microprocessor and I/O processor can be accessing a different bank. In order to effect his, however, the user/programmer must superimpose on the programming the goal of minimizing overlap in access demand for the memory banks by the microprocessor and I/O processor. This requires careful scheduling of the I/O and computing tasks so that simultaneous demand by both processors for the same memory bank is avoided or at least reduced. That imposes a burdensome ancillary constraint on the user. The fourth approach is to simply run the memory at twice the normal cycle speed. But this is difficult, especially in signal processing systems where memories are already operating at near capacity as a rule.